Kalomiros, JohnLygouras, John2015-01-312024-09-272015-01-312024-09-272009https://repository2024.ihu.gr/handle/123456789/67The processing results of two stereo accelerators implemented in reconfigurable hardware are presented. The first system implements a local method to find correspondences, the sum of absolute differences, while the second uses a global approach based on dynamic programming. The basic design principles of the two systems are presented and the systems are tested using a multitude of reference test benches. The resulting disparity maps are compared in terms of rms error and percentage of bad matches, using both textured and textureless image areas. A stereo head is developed and used with the accelerators, testing theirability in a real-world experiment of map reconstruction in real-time. It is shown that the DP-based accelerator produces the best results in almost all cases and has advantages over traditional hardware implementations based on local SAD correlation.18enAttribution-NonCommercial-NoDerivatives 4.0 Διεθνέςhttp://creativecommons.org/licenses/by-nc-nd/4.0/Άρθρο σε επιστημονικό περιοδικό10.1155/2009/914186Stereo processingFPGAsHardware design