Καλόμοιρος, Ιωάννης2015-02-012024-09-272015-02-012024-09-272012https://repository2024.ihu.gr/handle/123456789/81The hardware/software implementation of a novel image acquisition system, designed to host advanced processing techniques, is introduced. The system is suitable for robotic vision applications, such as stereo image processing, visual odometry etc. The architecture is based on a Cyclone IV Altera FPGA device that constitutes the main processing unit and on a 32–bit Microchip PIC32 microcontroller as a complementary processor. The microcontroller undertakes peripheral control tasks, relieving valuable resources from the FPGA. The system can capture image data simultaneously from two CMOS sensors and store necessary image rows in FPGA's on chip memory. Moreover, it uses a FIFO-to-USB module to transfer plain or processed image data to a host computer. The system also supports VGA connectivity. Operational tasks such as frame grabbing, image processing and communication with high-speed USB module are implemented in VHDL. A host computer interface has also been developed in order to test the overall system in action. The system is evaluated in terms of real-time performance and the advantages emanating from the proposed architecture are discussed.Attribution-NonCommercial-NoDerivatives 4.0 Διεθνέςhttp://creativecommons.org/licenses/by-nc-nd/4.0/Ερευνητικό πρόγραμμαFPGAsCMOS image sensorsHardware design