Πλοήγηση ανά Συγγραφέα "Kalomiros, John"
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Τεκμήριο A host/co-processor FPGA-based Architecture for Fast Image Processing(2007) Kalomiros, John; Lygouras, JohnA general system architecture for fast image processing, based on a Field Programmable Gate Array (FPGA) co-processor and a host computer, is presented and evaluated. Images are transferred to the FPGA board via a high speed USB2.0 channel, implemented with a standard macrocell. A LabVIEW host application controlling a frame grabber and an industrial camera is used to capture and exchange video data with the hardware co-processor. The FPGA accelerator is based on a Altera Cyclone II chip and is implemented as a system-ona- programmable-chip (SOPC) with the help of an embedded Nios II software processor. The SOPC system integrates the processor, external and on chip memory, the communication channel and a typical image filter appropriate for the evaluation of the system performance. Measured transfer rates over the communication channel and processing times for the implemented hardware filters are presented for various frame sizes. A range of applications is also discussed.Τεκμήριο A reconfigurable architecture for robotic stereo vision(2012) Kalomiros, John; Lygouras, JohnA reconfigurable architecture for dense stereo is presented as an observation framework for a real-time implementation of the simultaneous localization and mapping problem in robotics. The reconfigurable sensor detects point features as corners from stereo image pairs, in order to use them at the measurement update stage of the procedure. The main hardware blocks are a dense depth stereo accelerator, a left and right image corner detector and a stage performing left-right consistency check for the detected features. For the stereo-processor stage we have implemented and tested both a localmatching method based on the Sum of Absolute Differences (SAD) and a global-matching component based on a maximum-likelihood dynamic programming technique (MLDP). The system includes a Nios II processor for data control and a USB 2.0 interface for host communication. The proposed hardware is applied as the sensor part in a real-time robotic localization and mapping experiment with the help of a small guided vehicle.Τεκμήριο Acceleration of image processing algorithms using minimal resources of custom reconfigurable hardware(2012) Vourvoulakis, John; Kalomiros, John; Lygouras, JohnThe hardware/software implementation of a custom vision board using minimal resources out of a reconfigurable platform is described. Demanding robotic vision applications in most cases require dedicated hardware for reliable operation. The designed system is based on a Cyclone IV Altera FPGA device that constitutes the main processing unit of the reconfigurable hardware and on a 32–bit Microchip PIC32 microcontroller as a complementary processor. The main goal of this research is to implement image processing algorithms using only minimal resources of the FPGA device. The microcontroller serves peripheral control tasks, relieving valuable resources from FPGA. Video images are captured using a CMOS image sensor. USB connectivity with a personal computer is provided using a FIFO-to-USB module. Operational tasks such as frame grabbing, image filtering and USB communication are integrated to the system by implementing custom-designed controllers in VHDL. Image processing functions are accelerated using a fully parallel pipeline which is described analytically. A host computer interface has also been developed in order to test the overall system in action. The system is evaluated in terms of resource usage and the advantages emanating from the proposed architecture are discussed.Τεκμήριο Angular dependence of the NEXAFS structure in hexagonal and cubic GaN(1996) Kalomiros, John; Katsikini, Maria; Paloura, Eleni; Bressler, Patrick; Moustakas, T. N.Επιταξιακά υμένια κυβικού και εξαγωνικού GaN, μελετώνται με χρήση φασμάτων απορρόφησης ακτίνων Χ, στην περιοχή της ακμής (ΝEXAFS), μετρημένων υπό διάφορες γωνίες. Στην περίπτωση του κυβικού GaN οι εντάσεις των γραμμών συντονισμού είναι ανεξάρτητες από τη γωνία πρόσπτωσης, ενώ στην περίπτωση του εξαγωνικού GaN εμφανίζεται μια εξάρτηση της μορφής cos2θ. Προτείνεται ότι τα φάσματα NEXAFS μπορούν να χρησιμοποιηθούν για την ταυτοποίηση της συμμετρίας των υπο εξέταση κρυστάλλων.Τεκμήριο Comparative study of local SAD and dynamic programming for stereo processing using dedicated hardware(2009) Kalomiros, John; Lygouras, JohnThe processing results of two stereo accelerators implemented in reconfigurable hardware are presented. The first system implements a local method to find correspondences, the sum of absolute differences, while the second uses a global approach based on dynamic programming. The basic design principles of the two systems are presented and the systems are tested using a multitude of reference test benches. The resulting disparity maps are compared in terms of rms error and percentage of bad matches, using both textured and textureless image areas. A stereo head is developed and used with the accelerators, testing theirability in a real-world experiment of map reconstruction in real-time. It is shown that the DP-based accelerator produces the best results in almost all cases and has advantages over traditional hardware implementations based on local SAD correlation.Τεκμήριο Design and hardware implementation of a stereo-matching system based on dynamic programming(2011-07) Kalomiros, John; Lygouras, JohnA new real-time stereo system is presented based on a hardware implementation of an efficient Dynamic Programming algorithm. A simple state-machine calculates the cost-matrix along the diagonal of the 2-D disparity space for each epipolar pair of image scan-lines. Minimum transition costs are stored in embedded RAM and are used to backtrack disparities at clock rate. All calculations are within a pre-determined slice of the cost plane, representing the useful disparity range. The system is designed as a VHDL library component and is implemented as a SoC in a medium-capacity Field Programmable Gate Array chip. It can process stereo-pairs in full VGA resolution at a rate of 25 Mpixels/s and produces 8-bit dense disparity maps within a range of disparities up to 65 pixels. The design is evaluated comparing to ground truth and in terms of resource usage. It is also compared to a software implementation of the Dynamic Programming algorithm and to other FPGA-based stereo systems.Τεκμήριο Design and Implementation of a Hardware Accelerator for one-Dimensional signal Filtering Operations(Τ.Ε.Ι. Κεντρικής Μακεδονίας, 2014-06) Koutropoulos, Konstantinos; Κουτρόπουλος, Κωνσταντίνος; Kalomiros, John; Καλόμοιρος, Ιωάννης; Σχολή Τεχνολογικών Εφαρμογών, Τμήμα Μηχανικών Πληροφορικής Τ.Ε.; Master’s Degree in Communication and Information SystemsThe objective of this thesis is the design of a low-pass Finite Impulse Response filter using hardware description language for FPGA implementation. The window design method was followed and the filter was described in VHDL. The design tool used for the synthesis of the filter is Quartus II v. 9.1 by Altera. Modelsim by Mentor Graphics was used for simulation, in order to verify the filter operation and the accuracy of the results. The comparison with a software-based implementation of the same filter demonstrates that the filter meets the requirements. Bottom-up hierarchical design was used. The various components were first described in VHDL and then they were instantiated in order to produce the top design entity of the filter. Such filter components that need description are the shift register for the creation of the convolution window, the ROM stage where the filter coefficients are stored, the computationally demanding parallel multiplication stage and finally, the accumulation and normalization stage, where the output sample is computed. Specifications for the necessary data types were defined and alternative implementations of specific stages were tested, as a means to establish best design methodology. We find that a filter with 101 coefficients can reproduce the original double precision filter specifications using just 14% of the resources of a Cyclone II EP2C35 low cost FPGA device. Also, it can achieve a maximum clock frequency of 50 MHz.Τεκμήριο Excitonic and other interband transitions in TlIn2 single crystals(1993) Kalomiros, John; Anagnostopoulos, AntoniosA study of the optical properties of the layered compound TlInS2 is presented. Reflection spectra were measured at room temperature, in the energy region 1.5-6.2 eV. Transmission spectra were measured in the temperature range 10-290K, in the energy region 1.5 to 3.5 eV. Two structures, at energy positions 2.57 and 2.87 eV (10K), are attributed to transitions to the ground exciton state, from valence states split because of the spin-orbit interaction, at the point G of the Brillouin zone. Lorentzian line shapes are used to fit the structures of excitonic origin. The temperature dependence of the peaks and their broadening parameters are also presented.Τεκμήριο Hardware implementation of an optimized scale-invariant feature detector for robotic applications(2014) Kalomiros, John; Vourvoulakis, John; Lygouras, JohnA new architecture for the real-time detection of scale-invariant features in image sequences is presented. The system is based on a low-cost smart-camera custom board, developed to target robotic vision applications. Several optimizations of the SIFT detection procedure are proposed in order to achieve robust keypoint detection with high repeatability and recall values. As a result, a high accuracy and resourceefficient implementation of the SIFT detector is presented. The system is pipelined and streams pixel data using a 45 MHz clock, allowing keypoint detection at 150 frames per second, in video sequences with resolution 640x480. Integrating a commodity CMOS sensor, the prototype system displays keypoints at video rate, using only a fraction of the resources of a low-cost FPGA device.Τεκμήριο Intelligent management and control of electrical loads using microcontroller-based embedded systems(Τ.Ε.Ι. Κεντρικής Μακεδονίας, 2015-05) Zigkirkas, Grigorios; Ζιγκίρκας, Γρηγόριος; Kalomiros, John; Καλόμοιρος, Ιωάννης; Σχολή Τεχνολογικών Εφαρμογών, Τμήμα Μηχανικών Πληροφορικής Τ.Ε.The design and implementation of an intelligent 3-phase, programmable soft-start controller, for low voltage induction motors is presented. The controller is implemented with a low-cost microcontroller and is based on a timer-driven, fuzzy-logic closed loop. A TRIAC-based switching circuit in series with the line voltage is used for current flow control during start-up. A timer-based embedded application adjusts the TRIAC triggering angle by shifting the TRIAC ignition pulse within the voltage period at a constant rate. Multitasking logic controls all three phases simultaneously. As a result, the voltage is gradually increased in the three-phase system, until the motor reaches full speed. An external user-defined setting can adjust the time frame from start to full speed. Certain improvements are introduced with regard to former similar designs, the most important being a closed-loop, voltage sensing, three-rule fuzzy system that effectively balances the inductive behavior and restores a predictable time-ramp at start-up. Because of the inductive character of three-phase asynchronous motors, the residual current after switch-off leads to higher nominal voltage across the motor coils, depending on the actual load. Therefore, it is found that an open-loop timer-driven switching logic is not adequate for a reliable soft start controller, since it can result in start-up time being unpredictably shorter than the one corresponding to user settings. In order to adjust torque to load behavior and produce a constant ramp depending only on user-defined time settings, a closed-loop fuzzy-logic system is introduced. A voltage sensor acquires the residual voltage in one of the system’s phase lines at adequate sampling rate and computes an input to a three-rule fuzzy system, in the form of an error function. The output of the system infers the time interval to the next ignition pulse. Both the timer logic and the fuzzy system logic are embedded in a lowcost PIC18F252 microcontroller. The behavior of the soft-start controller is smooth and predictable. The voltage ramp from zero to maximum voltage is very close to that corresponding to an equivalent ohmic load.Τεκμήριο A Method for Simulating Digital Circuits for Evolutionary Optimization(2014-12) Kazarlis, Spyros; Kalomiros, John; Mastorocostas, Paris; Petridis, Vassilios; Balouktsis, Anastasios; Kalaitzis, Vassilios; Valais, AntoniosThis work presents a method for simulating asynchronous digital circuits, of both combinational and sequential logic, at the gate level. The simulator is going to serve as a fitness function of an Evolutionary Algorithm that will be used for optimal synthesis of digital circuits. Therefore the simulator needs to be simple, fast and reliable. The circuit under evaluation will be given to the simulator in an encoded form resembling DNA. Both the circuit codification method and the simulator are analytically discussed. Results are presented for a number of combinatorial and sequential digital circuits that prove the efficiency of the simulation method.Τεκμήριο Modeling the non-linear behavior of a driven varactor resonator at low frequencies(2006) Kalomiros, John; Καλόμοιρος, Ιωάννης; Stavrinidis, Stavros; Milliou, Amalia; Ozer, MehmetThe nonlinear behaviour of an R–L-Varactor circuit, simulated by Multisim 7.0 at a driving frequency that is below the circuit resonance frequency, is reported and evaluated. A new high amplitude oscillation is observed and attributed to the emergence of a large diode junction capacitance. Increasing the driving signal amplitude, the circuit is led to a non-periodic mode of operation, producing trajectories of increasing chaotic content in a four-dimensional phase space. At specific amplitudes a two-dimensional tori was monitored, where trajectories are periodic, like in a two oscillator system with commensurate frequencies. Poincar´e crosssections, FFT spectra and correlation dimension calculations, suggest the quasi-periodicity route to chaos.Τεκμήριο Optical and photoelectrical properties of the TlGaS2 ternary compound(1996) Kalkan, Nevin; Kalomiros, John; Hanias, M.; Anagnostopoulos, AntoniosAbsorption and photoconductivity spectra of thin TlGaS2 layers are used to study tbe fundamental and other transitions of TlGaS2 in the energy region 1.0-3.0 eV and in the temperature range lo-300 K. One of the peaks resolved by photoconductivity measurements corresponds to the excitonic peak registered in the absorption spectrum of this compound. The temperature dependence of the critical energy and of the broadening parameter of this excitonic peak are presented. Most of the rest photoconductivity peaks are related to transitions from localized levels to the conduction band.Τεκμήριο Real-time data acquisition system for the ECP-EPP Parallel port based on PIC16F877 Microcontroller(2006) Kalomiros, JohnThe design of a simple and low cost 10-bit data acquisition system is presented which makes use of the peripherals of a PIC16F877 microcontroller, interfacing with a personal computer using the extended capabilities of the parallel port. The system is integrated with a visual programming tool based on LabVIEW data acquisition software, which provides design flexibility and real time signal processing capabilities. An optimum assembly code for the PIC microcontroller allows for a free-running mean sampling rate of 100KSps on a Pentium PC running Windows XP OS. This system can be an example of a low cost integrated approach for data acquisition that includes a microcontroller, a personal computer and visual measurement software. The system can be the basis of a A/D interface for many measurement applications and can also be seen as an educational paradigm in itself. An effective and fast DAC solution is also presented in full integration with the microcontroller and the computer parallel port.Τεκμήριο A reconfigurable architecture for stereo-assisted detection of point-features for robot mapping(2009) Kalomiros, John; Καλόμοιρος, Ιωάννης; Lygouras, JohnA hardware-friendly procedure is presented for the extraction of point-features from stereo image pairs for the purpose of real-time robot motion estimation and 3-D environmental mapping. The procedure is implemented in reconfigurable hardware and is developed as a set of custom HDL library components ready for integration in a system-ona- programmable-chip. The main hardware stages are a stereo accelerator, a left and right image corner detector and a stage performing left-right consistency check. For the stereoprocessor stage we have implemented and tested a SAD-based component for local area-matching and a global-matching component based on a Maximum-Likelihood dynamic programming technique. The system includes a Nios II processor for data control and a USB 2.0 interface for host communication. Resource usage and 3D-mapping results are reported for different versions of the reconfigurable system.Τεκμήριο Robotic mapping and localization with real-time dense stereo on reconfigurable hardware(2010-01) Kalomiros, John; Lygouras, JohnA reconfigurable architecture for dense stereo is presented as an observation framework for a real-time implementation of the simultaneous localization and mapping problem in robotics. The reconfigurable sensor detects point features from stereo image pairs to use at the measurement update stage of the procedure. The main hardware blocks are a dense depth stereo accelerator, a left and right image corner detector, and a stage performing left-right consistency check. For the stereo-processor stage, we have implemented and tested a global-matching component based on a maximum-likelihood dynamic programming technique. The system includes a Nios II processor for data control and a USB 2.0 interface for host communication. Remote control is used to guide a vehicle equipped with a stereo head in an indoor environment. The FastSLAM Bayesian algorithm is applied in order to track and update observations and the robot path in real time. The system is assessed using real scene depth detection and public reference data sets. The paper also reports resource usage and a comparison of mapping and localization results with ground truth.Τεκμήριο Robust 3D vision for robots using dynamic programming(2011) Nalpantidis, Lazaros; Kalomiros, John; Gasteratos, AntoniosIn this paper a new stereo vision method is presented that combines the use of a lightness-invariant pixel dissimilarity measure within a dynamic programming depth estimation framework. This method uses concepts such as the proper projection of the HSL colorspace for lightness tolerance, as well as the Gestalt-based adaptive support weight aggregation and a dynamic programming optimization scheme. The robust behavior of this method is suitable for the working environments of outdoor robots, where non ideal lighting conditions often occur. Such problematic conditions heavily affect the efficiency of robot vision algorithms in exploration, military and security applications. The proposed algorithm is presented and applied to standard image sets.