Acceleration of image processing algorithms using minimal resources of custom reconfigurable hardware
Φόρτωση...
Ημερομηνία
2012
Συγγραφείς
Vourvoulakis, John
Kalomiros, John
Lygouras, John
Τίτλος Εφημερίδας
Περιοδικό ISSN
Τίτλος τόμου
Εκδότης
Δικαιώματα
Attribution-NonCommercial-NoDerivatives 4.0 Διεθνές
Άδειες
Παραπομπή
Παραπομπή
Περίληψη
The hardware/software implementation of a custom
vision board using minimal resources out of a reconfigurable
platform is described. Demanding robotic vision applications in
most cases require dedicated hardware for reliable operation.
The designed system is based on a Cyclone IV Altera FPGA
device that constitutes the main processing unit of the
reconfigurable hardware and on a 32–bit Microchip PIC32
microcontroller as a complementary processor. The main goal of
this research is to implement image processing algorithms using
only minimal resources of the FPGA device. The microcontroller
serves peripheral control tasks, relieving valuable resources from
FPGA. Video images are captured using a CMOS image sensor.
USB connectivity with a personal computer is provided using a
FIFO-to-USB module. Operational tasks such as frame grabbing,
image filtering and USB communication are integrated to the
system by implementing custom-designed controllers in VHDL.
Image processing functions are accelerated using a fully parallel
pipeline which is described analytically. A host computer
interface has also been developed in order to test the overall
system in action. The system is evaluated in terms of resource
usage and the advantages emanating from the proposed
architecture are discussed.